FPGA-based design using a generalized Boolean decomposition method
A generalized Boolean decomposition algorithm is formulated to map a Boolean function into a network of universal cells capable of implementing any function with a fixed number of inputs and outputs. The method is applied to several standard benchmarks and the results presented. When the algorithm is targeted at a technology-specific multi-input cell structure, the cell count is reduced considerably.
Computer Engineering | Controls and Control Theory | Electrical and Computer Engineering | Signal Processing | Systems and Communications
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Patel, D. C.
FPGA-based design using a generalized Boolean decomposition method.
International Journal of Electronics, 78(4),