Modern Flash Technologies: A Flash Translation Layer Perspective

Document Type

Article

Publication Date

7-2013

Publication Title

International Journal of High Performance Systems Architecture

Volume

4

Issue

3

First page number:

167

Last page number:

182

Abstract

Since the introduction of the first flash memory in 1984, flash memory has been a very important member of the non-volatile semiconductor memory family due to its advantages, such as high density, low-cost, shock resistance, fast access time, low-power consumption and reliability. Despite the advantages, flash memory is still facing many technical limitations that need to be further studied. Various solutions have been developed to improve the performance of flash memory by overcoming the technical limitations; however, flash translation layer has a great impact on the overall performance improvement due to its cost-efficiency and usefulness. In this paper, three main aspects of flash memory are discussed from a perspective of flash translation layer. First, we discuss and classify flash translation layer based on the mapping method. Second, we discuss the current technical limitations that flash memory is facing and how these can be overcome by adopting flash translation layer. Third, we investigate the latest flash translation layer schemes that have been recently studied and proposed, and analyse their advantages and drawbacks.

Keywords

Block-level; Flash memory; Flash translation layer; FTL; Hybrid-level; Page-level

Disciplines

Electrical and Computer Engineering | Electrical and Electronics | Electromagnetics and Photonics | Nanotechnology Fabrication | Power and Energy | Signal Processing

Language

English

Permissions

Use Find in Your Library, contact the author, or interlibrary loan to garner a copy of the item. Publisher policy does not allow archiving the final published version. If a post-print (author's peer-reviewed manuscript) is allowed and available, or publisher policy changes, the item will be deposited.

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