Award Date

12-1-2014

Degree Type

Dissertation

Degree Name

Doctor of Philosophy (PhD)

Department

Electrical Engineering

First Committee Member

Peter Stubberud

Second Committee Member

Sahjendra Singh

Third Committee Member

Ebrahim Saberinia

Fourth Committee Member

R. Jacob Baker

Fifth Committee Member

Laxmi Gewali

Number of Pages

127

Abstract

The ever increasing demand for faster and more powerful digital applications requires high speed, high resolution ADCs. Currently, sigma delta modulators ADCs are extensively used in broadband telecommunication systems because they are an effective solution for high data-rate wireless communication systems that require low power consumption, high speed, high resolution, and large signal bandwidths.

Because mixed-signal integrated circuits such as Continuous Time sigma delta modulators contain both analog and digital circuits, mixed signal circuits are not as simple to model and simulate as all discrete or all analog systems. In this dissertation, the delta transform is used to simulate CT sigma delta modulators, and its speed and accuracy are compared to the other methods. The delta transform method is shown to be a very simple and effective method to get accurate results at reasonable speeds when compared with several existing simulation methods.

When a CT sigma delta modulator is overloaded, sigma delta modulator's output signal to quantization noise ratio (SQNR) decreases when the sigma delta modulator's input is increased over a certain value. In this dissertation, the range of quantizer gains that cause overload are determined and the values ware used to determine the input signal power that prevents overload and the CT sigma delta modulator's maximum SQNR. The CT sigma delta modulators from 2nd to 5th order are simulated to validate the predicted maximum input power that prevents overload and the maximum SQNR.

Determining the stability criteria for CT sigma delta modulators is more difficult than it is for Discrete time sigma delta modulators (DT sigma delta modulators) because CT sigma delta modulators include delays which are modeled mathematically by exponential functions for CT systems. In this dissertation an analytical root locus method is used to determine the stability criteria for CT sigma delta modulators. This root locus method determines the range of quantizer gains for which a CT sigma delta modulator is stable. These values can then be used to determine input signal and internal signal powers that prevent sigma delta modulators from becoming unstable. Also, the maximum input power that keeps the CT sigma delta modulators stable for CT sigma delta modulators operating in overload can be determined. The CT sigma delta modulators from 2nd to 5th order are simulated to validate the predicted maximum input power that keeps the CT sigma delta modulators stable.

Keywords

Application software; Delta operator; Delta transform; Excess loop delay; Mixed signal circuits; Modulators (Electronics); Root locus method

Disciplines

Computer Engineering | Computer Sciences | Digital Communications and Networking | Electrical and Computer Engineering

Language

English


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