Title

FPGA-based design using a generalized Boolean decomposition method

Document Type

Article

Publication Date

1995

Publication Title

International Journal of Electronics

Volume

78

Issue

4

First page number:

691

Last page number:

698

Abstract

A generalized Boolean decomposition algorithm is formulated to map a Boolean function into a network of universal cells capable of implementing any function with a fixed number of inputs and outputs. The method is applied to several standard benchmarks and the results presented. When the algorithm is targeted at a technology-specific multi-input cell structure, the cell count is reduced considerably.

Keywords

Computer algorithms; Decomposition method; Field programmable gate arrays; Integrated circuits—Very large scale integration; Logic circuits

Disciplines

Computer Engineering | Controls and Control Theory | Electrical and Computer Engineering | Signal Processing | Systems and Communications

Language

English

Permissions

Use Find in Your Library, contact the author, or use interlibrary loan to garner a copy of the article. Publisher copyright policy allows author to archive post-print (author’s final manuscript). When post-print is available or publisher policy changes, the article will be deposited

Identifier

DOI: 10.1080/00207219508926202

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