A Routing-table-based Adaptive and Minimal Routing Scheme on network-on-chip Architectures

Document Type

Article

Publication Date

11-2009

Publication Title

Computers and Electrical Engineering

Volume

35

Issue

6

First page number:

846

Last page number:

855

Abstract

In this paper, we present a routing algorithm that combines the shortest path routing and adaptive routing schemes for NoCs. In specific, routing follows the shortest path to ensure low latency and low energy consumption. This routing scheme requires routing information be stored in a series of routing tables created at the routers along the routing path from the source to the destination. To reduce the exploration space and timing cost for selecting the routing path, a routing list and routing table for each node are created off-line. Routing table is updated on-line to reflect the dynamic change of the network status to avoid network congestion. To alleviate the high hardware implementation cost associated with the routing tables, a method to help reduce the size of the routing tables is also introduced. Compared to the existing routing algorithms, the experimental results have confirmed that the proposed algorithm has better performance in terms of routing latency and power consumption.

Keywords

Interconnect; Mesh; Network-on-chip; Routing; SoC

Disciplines

Electrical and Computer Engineering | Electrical and Electronics | Electromagnetics and Photonics | Electronic Devices and Semiconductor Manufacturing | Power and Energy | Signal Processing | Systems and Communications

Language

English

Permissions

Use Find in Your Library, contact the author, or interlibrary loan to garner a copy of the item. Publisher policy does not allow archiving the final published version. If a post-print (author's peer-reviewed manuscript) is allowed and available, or publisher policy changes, the item will be deposited.

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