Fault-tolerant routing schemes in RDT(2,2,1)/α based interconnection network for networks-on-chip designs

Document Type

Conference Proceeding


It has been well recognized that the fault-tolerance capability is vital for a NoC system, since one faulty link/processor may isolate a large fraction of processors. Continuing from a previous paper where a RDT(2,2,1)/α-based interconnection network for NoC designs was proposed, we investigate fault-tolerant routing schemes on NoC systems featuring a RDT-based interconnection network. In particular, we propose two fault-tolerant routing schemes in the presence of either single link/node failure or multiple link/node failures. The proposed routing schemes are based on deterministic routing. Alternative routes are discovered by properly selecting the intermediate nodes between the source and the destination nodes on the rank tori. As of the single link/node failure case, we show that the number of routers on the detoured route generated by the proposed routing scheme is at most 2 more than the number of routers on the original route.


Computer Engineering | Digital Circuits | Digital Communications and Networking | Electrical and Computer Engineering | Electrical and Electronics | Electronic Devices and Semiconductor Manufacturing | Hardware Systems | Systems and Communications | VLSI and Circuits, Embedded and Hardware Systems


Use Find in Your Library, contact the author, or interlibrary loan to garner a copy of the item. Publisher policy does not allow archiving the final published version. If a post-print (author's peer-reviewed manuscript) is allowed and available, or publisher policy changes, the item will be deposited.