A Compressed Sensing X-ray Camera with a Multilayer Architecture
Journal of Instrumentation
Institute of Physics Publishing
Recent advances in compressed sensing theory and algorithms offer new possibilities for high-speed X-ray camera design. In many CMOS cameras, each pixel has an independent on-board circuit that includes an amplifier, noise rejection, signal shaper, an analog-to-digital converter (ADC), and optional in-pixel storage. When X-ray images are sparse, i.e., when one of the following cases is true: (a.) The number of pixels with true X-ray hits is much smaller than the total number of pixels; (b.) The X-ray information is redundant; or (c.) Some prior knowledge about the X-ray images exists, sparse sampling may be allowed. Here we first illustrate the feasibility of random on-board pixel sampling (ROPS) using an existing set of X-ray images, followed by a discussion about signal to noise as a function of pixel size. Next, we describe a possible circuit architecture to achieve random pixel access and in-pixel storage. The combination of a multilayer architecture, sparse on-chip sampling, and computational image techniques, is expected to facilitate the development and applications of high-speed X-ray camera technology. © 2018 IOP Publishing Ltd and Sissa Medialab.
Instrumentation for FEL; Instrumentation for particle accelerators and storage rings - high energy (linear accelerators, synchrotrons); Solid state detectors; X-ray detectors
Chen, W. W.,
Kenyon, G. T.,
Sun, K. X.
A Compressed Sensing X-ray Camera with a Multilayer Architecture.
Journal of Instrumentation, 13(1),
Institute of Physics Publishing.