Towards Temperature-Insentive Nanoscale CMOS Circuits with Adaptively Regulated Voltage Power Supplies
Journal of VLSI Design & Communication Systems
In this paper, we show that the temperature-induced performance drop seen in nanoscale CMOS circuitscan be tackled by powering the circuits with adaptively regulated voltage power supplies. Essentially, when temperature rises, the supply voltage will be bumped up to offset otherwise performance degradation. To avoid thermal over-drift as chip temperature exceeds its operation range, a voltage limiteris integrated into the proposed power supply to cap the supply voltage. Using this proposed adaptive voltage source to power individual CMOS logic gates and/or subsystems will free the chips from using expensive high-precision temperature sensors for thermal management and performance tuning. Experiments on various benchmark circuits, which are implemented with a 45nm CMOS technology, have confirmed that the circuit delay variation can be reduced to 15%~30% over a wide temperature range (0℃ to 90℃), a sharp contrast to the large delay variations(50%~75%)observed in most IC designs where a constant power supply is employed.
Towards Temperature-Insentive Nanoscale CMOS Circuits with Adaptively Regulated Voltage Power Supplies.
Journal of VLSI Design & Communication Systems, 8(3),