Award Date

1-1-2001

Degree Type

Thesis

Degree Name

Master of Science (MS)

Department

Electrical and Computer Engineering

First Committee Member

Rama Venkat

Number of Pages

96

Abstract

In this work, a novel metal-insulator-metal (MIM) capacitor process is introduced and integrated in a Copper Interconnect technology, whose smallest feature size is 0.18mum process, which has good yield, reliability and repeatability. The MIM uses a one-photomask process and hence is termed as the Low-cost-integration (LCI) MIM. The LCI MIM uses copper as the bottom electrode, plasma enhanced silicon nitride as the dielectric, and Tantalum nitride as the top electrode. The target capacitance density is 1.5fF/mum2. The target leakage current is 1e-7A/cm2 at 3.3V at 125°C. The maximum operating voltages that the MIM is designed for is 5V. The voltage linearity is desired to be less than 100ppm/v; The purpose of the study is to determine the feasibility of integrating the low-cost-integration (LCI) MIM capacitor and to characterize the device to ensure that it meets the above mentioned target values for the various parameters. This is done by electrically characterizing the capacitor for the capacitance change with voltage, the leakage current at accelerated voltages and the time-dependent-dielectric breakdown (TDDB) under various electric fields. (Abstract shortened by UMI.).

Keywords

Characterization; Copper; Cvd; Dielectric; Electrical; Enhanced; Nitride; Plasma; Silicon

Controlled Subject

Electrical engineering

File Format

pdf

File Size

2160.64 KB

Degree Grantor

University of Nevada, Las Vegas

Language

English

Permissions

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Identifier

https://doi.org/10.25669/0sft-8ii6


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