Award Date

1-1-2007

Degree Type

Dissertation

Degree Name

Doctor of Philosophy (PhD)

Department

Electrical and Computer Engineering

First Committee Member

Rama Venkat

Number of Pages

84

Abstract

Flash memory devices based on continuous floating gate are rapidly approaching their technological limitations due to excessive gate leakage currents, resulting from reduced tunnel oxide thickness. A new architecture based on Si-Nanocrystal floating gate has shown promise through realization of devices with reduced gate leakage current and lower programming and erase voltages. The dominant transport mechanisms in this device are tunneling of electrons from the (3-D) silicon into the (0-D) nanocrystals and Fowler-Nordheim tunneling of carriers from nanocrystals to the bulk Si. In order to accurately model the charging dynamics of such devices, size based quantum confinement effects should be included. A fully physics based model is developed to describe the current-voltage and current-time characteristics of Si-Nanocrystal Floating Gate flash memory cells. The model includes the size dependent quantum confinement effects and Coulomb blockade effects. The results of the model are compared with various experimental results, such as current-voltage characteristics, program time versus gate voltage and drain voltage characteristics and the agreement in general is good. The model is very flexible, and it can be used to investigate the charging dynamics of any type of nanocrystals embedded in any type of dielectric layers. Additionally, a possible process methodology to achieve control on the size and density of the nanocrystals is proposed.

Keywords

Cell; Charging; Charging Dynamics; Dynamic; Flash; Flash Memory Cell; Memory; Modeling; Nanocrystal Physics; Silicon; Silicon Nanocrystal; Volatile

Controlled Subject

Electrical engineering

File Format

pdf

File Size

2273.28 KB

Degree Grantor

University of Nevada, Las Vegas

Language

English

Permissions

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Identifier

https://doi.org/10.25669/m314-uu12


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