Award Date

1-1-1997

Degree Type

Thesis

Degree Name

Master of Science (MS)

Department

Electrical and Computer Engineering

First Committee Member

Peter Stubberud

Number of Pages

168

Abstract

New dynamic element matching techniques are shown to reduce the harmonic distortion and improve the spurious-free dynamic range of flash ADCs. Resistor chain mismatch errors are negated by randomly rearranging the resistors each sample by utilizing 5(2{dollar}\sp{b}{dollar}-1) digital switches and b + 1 random control signals for a b-bit flash ADC. The integral and differential nonlinearity of a non-ideal flash ADC are derived for three common resistor chain mismatch errors; namely, geometric mismatches, linear gradient mismatches, and dynamic mismatches. The transfer function of a non-ideal flash ADC is also derived and the converter output is shown to consist of a scaled copy of the input, a DC gain, and conversion noise that is a function of the resistor mismatches. A comprehensive summary of dynamic element matching techniques given in literature is provided. In addition, the DEM network introduced by Galton and Jensen is shown to be equivalent to the generalized-cube network used in parallel processing architectures. An alternative version of this network that uses logic gates is also proposed.

Keywords

Converters Distortion; Dynamic; Element; Flash; Harmonic; Incorporating; Low; Matching; Techniques

Controlled Subject

Electrical engineering

File Format

pdf

File Size

5324.8 KB

Degree Grantor

University of Nevada, Las Vegas

Language

English

Permissions

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Identifier

https://doi.org/10.25669/mwss-e787


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