An Efficient Protocol with Synchronization Accelerator for Multi-processor Embedded Systems

Authors

Jianyi Yang, Zhejiang University of TechnologyFollow
Peng Liu, Zhejiang UniversityFollow
Weidong Wang, Zhejiang UniversityFollow
Chunming Huang, Zhejiang UniversityFollow
Jie Yang, Zhejiang UniversityFollow
Yingtao Jiang, University of Nevada, Las VegasFollow
Qingdong Yao, Zhejiang UniversityFollow

Document Type

Article

Publication Date

1-2013

Publication Title

Parallel Computing

Volume

39

Issue

9

First page number:

461

Last page number:

474

Abstract

With the proliferation of multi-processor core systems, parallel programming imposes a difficult challenge where current solutions are far from being considered efficient. In order to alleviate the difficulty of parallel programming, we propose a scheduler, which is part of a master–slave RTOS, to efficiently manage the parallel programs running on a multi-processor core system. We also propose an efficient protocol that serves as the interface between the operating system and application programs. This interface protocol runs on a dedicated control subnet to cut down the synchronization overhead between the parallel tasks. Such synchronization overhead incurred in these multi-core parallel systems has been recognized as one of the severe limiting factors when pushing up the performance envelope. Experimental results, obtained from the register-transfer level simulations of various benchmark parallel programs, show that the proposed protocol and the control subnet can improve the system efficiency by up to 33.5%. This protocol, as it is designed to be compatible with the minimum subset of the message-passing interface functions (MPI), scales well with the number of cores.

Keywords

Interface protocol; Multicore; Parallel programming; Real-time operating system; Synchronization

Disciplines

Controls and Control Theory | Electrical and Computer Engineering | Electrical and Electronics | Electronic Devices and Semiconductor Manufacturing | Signal Processing | Systems and Communications

Language

English

Permissions

Use Find in Your Library, contact the author, or interlibrary loan to garner a copy of the item. Publisher policy does not allow archiving the final published version. If a post-print (author's peer-reviewed manuscript) is allowed and available, or publisher policy changes, the item will be deposited.

Repository Citation

Yang, J., Liu, P., Wang, W., Huang, C., Yang, J., Jiang, Y., Yao, Q. (2013). An Efficient Protocol with Synchronization Accelerator for Multi-processor Embedded Systems. Parallel Computing, 39(9), 461-474.