Award Date


Degree Type


Degree Name

Doctor of Philosophy in Electrical Engineering


Electrical and Computer Engineering

First Committee Member

Emma E. Regentova, Chair

Second Committee Member

Yingtao Jiang

Third Committee Member

Venkatesan Muthukumar

Graduate Faculty Representative

Ajoy K. Datta

Number of Pages



As indicated in the latest version of ITRS roadmap, optical wiring is a viable interconnection technology for future SoC/SiC/SiP designs that can provide broad band data transfer rates unmatchable by the existing metal/low-k dielectric interconnects. In this dissertation study, a set of different optical interconnection architectures are presented for future on-chip optical micro-networks.

Three Optical Network-on-Chip (ONoC) architectures, i.e., Wavelength Routing Optical Network-on-Chip (WRON), Redundant Wavelength Routed Optical Network (RDWRON) and Recursive Wavelength Routed Optical Network (RCWRON) are proposed. They are fully connected networks designed based on passive switching Microring Resonator (MRR) optical switches. Given enough different routing optical wavelengths, between any two nodes in the system a bi-directional communication channel can be built. WRON, RDWRON and RCWRON share the similar network structure with different specialties that fit to different applications.

A new topology of packet switching NoC architecture, i.e., Quartered Recursive Diagonal Torus (QRDT) is proposed. It is designed by overlaying diagonal torus. Due to its small diameter and rich routing recourses, QRDT leads to highly scalable NoCs.

By combining WRON's interconnection property and QRDT's network topology, a group of 2D-Torus based Packet Switching ONoC (TON) architectures is proposed. The TON is further refined to a generalized open-topology ONoC architecture, called Generalized 2D-Torus-based Optical Network-on-Chip (GTON). The communication protocol in TON is packet switching. The advantages of GTON stem from Wavelength Division Multiplexing (WDM), Direct Optical Channel (DOC) and MRR passive switching. As result, GTON architecture is highly scalable, has an ultra-high bandwidth, consumes a low power, and supports fault-tolerant routing. The work includes other issues such as channel design, analyses of the transmission power loss and the buffer.


Computer network architectures; Networks on a chip; Routing (Computer network management)


Computer and Systems Architecture | Computer Engineering | Digital Communications and Networking | Hardware Systems

File Format


Degree Grantor

University of Nevada, Las Vegas




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