Award Date

12-1-2020

Degree Type

Thesis

Degree Name

Master of Science in Electrical Engineering (MSEE)

Department

Electrical and Computer Engineering

First Committee Member

Emma Regentova

Second Committee Member

Venkatesan Muthukumar

Third Committee Member

Mei Yang

Fourth Committee Member

Yoohwan Kim

Number of Pages

50

Abstract

Circle Hough Transform (CHT) has found applications in biometrics, robotics, and imageanalysis. In this work, the focus is the development of a Field Programmable Gate Array (FPGA) based accelerator that performs a series of procedures and results in circle detection. The design is performed using Vivado High-Level Synthesis (HLS) tools and targeted for a Zynq UltraScale+ ZCU106. The implementation includes the following procedures: Gaussian filter, Sobel edge operator, thresholding, and finally the CHT algorithm. The performance is evaluated based on the execution time as compared to the software (Python code) execution and the analysis tools provided by Vivado HLS tool. The accuracy of detection is evaluated due to the approximation done for the sake of faster execution. The CHT requires a large amount of memory for its implementation, and thus the overall resource utilization is to be optimized. In this work we evaluate both the speed (time) and the number of logical blocks and memory components required for implementation. The core of the work is the efficient implementation of the Circle Hough Transform using High-Level Synthesis.

Keywords

Circle detection; Circle hough transform; Field programmable gate array; High-level synthesis

Disciplines

Computer Engineering | Electrical and Computer Engineering

File Format

pdf

File Size

1900 KB

Degree Grantor

University of Nevada, Las Vegas

Language

English

Rights

IN COPYRIGHT. For more information about this rights statement, please visit http://rightsstatements.org/vocab/InC/1.0/

Download


Share

COinS